HDL (Hardware Descriptive Language) based design has established itself as the modern approach to design of digital systems, with VHDL (VHSIC Hardware Description Language) and Verilog HDL being the two dominant HDLs. This VHDL Programming training course provides a thorough introduction to the VHDL programming language. The emphasis is on writing solid synthesizable code and enough simulation code to write a viable testbench. Structural, register transfer level (RTL), and behavioral coding styles are covered.
By attending VHDL Programming workshop, delegates will learn to:
- Understand VHDL syntax and coding styles relevant to logic design.
- Write VHDL RTL hardware designs using good coding practices.
- Understand the synthesizable subset of VHDL.
- Understand problematic issues in coding hardware.
- Use types, overloading, and conversion functions from standard VHDL packages (std_logic_1164 and numeric_std).
- Print messages in testbenches using TEXTIO.
- Write simple transaction-based testbenches using subprograms.
- Use your VHDL simulation and synthesis tools.
- Digital IC Designers
- VHDL/VERILOG Programmers
- FPGA Architects
- Embedded Design Engineers